High-Vt cells respond to the temperature inversion effect more effectively compared to Std-Vt and Low-Vt cells. Not only that but this temperature inversion effect is more pronounced at 0.9v but at higher voltages still higher temperatures act as worst corners. Std-Vt cells show a moderate temperature inversion effect but Low-Vt cells are almost immune to temperature inversion effect all through the voltage range from 0.9v to 1.1v. Now let’s try to understand the physics behind this temperature inversion effect. Cell delay at different voltages can be attributed to two reasons:
Mobility of the carriers : Threshold voltage.
Delay of a cell is inversely proportional to the mobility and directly proportional to threshold voltage Vt. Both mobility and threshold voltage decrease with increase in temperature. So, with the increase in the temperature the delay of a cell can
- Increase due to decrease in carrier mobility
- Decrease due to decrease in threshold voltage
That is why there could be varied behavior of the delay with multi-Vt taken into account due to race condition between mobility and threshold voltage depending upon which one is dominant, so at 1.1v the gate overdrive voltage is large enough that a decrease in Vt with temperature is negligible, so the mobility effect dominates and hence the delay of the gate increases with temperature.
But if you see at 0.9v gate overdrive voltage (Vov = Vdd-Vt) has reduced and hence Vt decrease dominates and delay decreases with increase in temperature. So, at the advanced technology nodes though the threshold voltage has not reduced much, but the gate overdrive voltage has reduced due to the reduction of supply voltages. Therefore, temperature inversion effects are more observed in technologies 40nm and below.
Lets first see, what does the delay of a MOS transistor depend upon, in a simplified model.
Delay = ( Cout * Vdd )/ Id [ approx ]
Where
Cout = Drain Cap
Vdd = Supply voltage
Id = Drain current.
Now lets see what drain current depends upon.
Id = µ(T) * (Vdd – Vth(T))α
Where
µ = mobility
Vth = threshold voltage
α = positive constant ( small number )
One can see that Id is dependent upon both mobility µ and threshold voltage Vth. Let examine the dependence of mobility and threshold voltage upon temperature.
μ(T) = μ(300) ( 300/T )m
Vth(T) = Vth(300) − κ(T − 300)
here ‘300’ is room temperature in kelvin.
Mobility and threshold voltage both decreases with temperature. But decrease in mobility means less drain current and slower device, whereas decrease in threshold voltage means increase in drain current and faster device.
The final drain current is determined by which trend dominates the drain current at a given voltage and temperature pair. At high voltage mobility determines the drain current where as at lower voltages threshold voltage dominates the darin current.
Lets first see, what does the delay of a MOS transistor depend upon, in a simplified model.
Delay = ( Cout * Vdd )/ Id [ approx ]
Where
Cout = Drain Cap
Vdd = Supply voltage
Id = Drain current.
Now lets see what drain current depends upon.
Id = µ(T) * (Vdd – Vth(T))α
Where
µ = mobility
Vth = threshold voltage
α = positive constant ( small number )
One can see that Id is dependent upon both mobility µ and threshold voltage Vth. Let examine the dependence of mobility and threshold voltage upon temperature.
μ(T) = μ(300) ( 300/T )m
Vth(T) = Vth(300) − κ(T − 300)
here ‘300’ is room temperature in kelvin.
Mobility and threshold voltage both decreases with temperature. But decrease in mobility means less drain current and slower device, whereas decrease in threshold voltage means increase in drain current and faster device.
The final drain current is determined by which trend dominates the drain current at a given voltage and temperature pair. At high voltage mobility determines the drain current where as at lower voltages threshold voltage dominates the darin current.
Little unsure...
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