Tie Cells & Spare cells

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Tie Cells

Tie-high and Tie-Low cells are used to connect the gate of the transistor to either power or ground.In Lower technology nodes or tie-high and tie-lo cells are used to avoid direct gate connection to the power or ground network,   if the gate is connected to power/ground the transistor might be turned on/off due to power or ground bounce

These cells are part of standard-cell library

The cells which require Vdd (Typically constant signals tied to 1) connect to Tie high cells

The cells which require Vss/Gnd (Typically constant signals tied to 0) connect to Tie Low cells

Need for tie cells? 

Gate oxide is thin and sensitive to voltage surges. Some processes does not let you connect the gates directly to power rails since any surge in voltage, like an ESD event, can damage the gate oxide. Hence tie cells, which are diode connected n-type or p-type devices are used instead.The gates won’t be connected to either power or ground directly.

That is the argument the foundries have for ESD protection against surges. Now, go check the schematic of the TIE cells in your standard cell library. It is possible that it is just an inverter tied with input tied either to VDD(Ti-lo) or VSS (ti-high). In that case, the gate of the tie cell is still connected to power rails. 

However there are some uses for these types of cells. Leakage current is reduced in this configuration.Also,rewiring these in times of an ECO is easier, especially if you just want to swap 1′b1 for a 1′b0.

Spare cells: 

Spare cells are extra cells placed at regular interval in the chip. They are floating cells and they are placed in a group of functional cells like(and, or, nor, mux, flop, inverter, buffer).

Once the chip is taped out and if any functional issue is found or any feature enhancement is required, these pre-placed cells can be used to add functionality without redoing the entire design.

In these caseonly the metal-ecos are performed and all the base layers are untouched, thus saving the cost of manufacturing.

Some companies are using the Post mask Eco cells( special kind of cells which can be programmed to function as any gate) in their design. 

when not used they act as simple filler cells.If any design changes are required then these cells can be used to perform the functionality.

Spare cells inputs are connected to Ground/Power when they are placed in the design and their outputs are left floating, if they are required to be used then their inputs are disconnected from VDD/GND and connected to functional logic in ECO mode.