CLP low power checks

 Once we start working on low power design, we need to perform low power checks 

That includes 

    Reading the PG netlist 

    Reading the UPF

    Run low power checks called CLP

Make sure IN ICC your check_mv_design is clean

Types of low  power checks

      Static Checks  

      Dynamic checks : Dynamic checks are performed on the design while running simulation. Dynamic checks detect behavioral issues in the design, such as incorrect power sequencing of power domains

Isolation cells

Lets look into the below picture , where we have two power domains PD1 & PD2. 

There is a signal crossing from PD1 to PD2.

When the chip is in functional working mode, when all the power domains are up -> 

Signal s1 will be  either a 0 or 1 value.

Now when the  PD_1 is powered-off and PD_2 is powered-ON.

    The value of signal s1 is unknown. That will corrupt the powered-up logic in the PD_2 domain

This is the condition where we need to insert isolation cells to avoid corrupting the signal S1. 

When we run CLP, tool will flag the below errors.

Clp-report-isolation-check

Level Shifter

Consider the scenario when  both of the power domains are powered-up. 

Now if voltage difference between the power domains is less than a threshold value, or means both the domains are working at equal voltage. then  there are no issues in the design. 

 if the voltage difference is greater than the threshold value, means PD3 is 1.5v & PD4 is 0.85, then a logic 1 at PD_1 can be assumed a logic 0 at PD_2. This leads to incorrect data transmission.

TO avoid this condition we need a level shifter cell. 

A level shifter cell can be of the following two types:

• High-to-Low – Converts a high-voltage level to a low-voltage level. It is inserted when the source power domain operates at a higher voltage and the sink power domain operates at a lower voltage.
• Low-to-High – Converts a low-voltage level to a high-voltage level. It is inserted when the source power domain operates at a lower voltage and the sink power domain operates at a higher voltage.

clp Level shifter checks: report

Retention cells  &    Checks

Consider you have a power domain, which is powered-down. When the domain is powered-up again, all the state information from before the domain was powered-down is lost. To avoid this, designers place retention cells in power domains, which stores the state value of the power domain. Retaining the state value helps the power domain become operational sooner.

A design may have multiple power domains that are powered-down, which may lead to many retention issues. The simulator runs various retention checks on the design to find out the retention issues, and flags an error in case of a violation.

Back-to-Back Checks

• Sometimes your design has back-to-back cells, which might be any of the following types:
• Isolation and level shifter cell
• Level shifter and isolation cell
• Isolation and isolation cell
• Level shifter and level shifter cell

Other checks

• The design cells have missing liberty attributes.
• The isolation, level shifter, or retention supply is powered-down during the active isolation, level shifting, or retention period.
• The power signal of a power domain gets corrupted.
• The input of a power domain toggles when the power domain is powered-down.
• The power state table or the supply port reaches an illegal or undefined state.

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