Retention cells

These cells are special flops with multiple power supply. They are typically used as a shadow register to retain its value even if the block in which its residing is shut-down.

 All the paths leading to this register need to be ‘always_on’ and hence special care must be taken to synthesize/place/route them. 

In a nut-shell, “When design blocks are switched off for sleep mode, data in all flip-flops contained within the block will be lost. If the designer desires to retain state, retention flip-flops must be used”.

The retention flop has the same structure as a standard master-slave flop. 

However, the retention flop has a balloon latch that is connected to true-Vdd. 

With the proper series of control signals before sleep, the data in the flop can be written into the balloon latch.

 Similarly, when the block comes out of sleep, the data can be written back into the flip-flop